So I got bored and decided to do some research regarding this.
Here's what looks to be the correct datasheet for the Octane TSOP56 EEPROM chip
https://www.alldatasheet.net/html-pdf/42...UT-70.html
For clarification
NB A0 on the TSOP56 version has a specific purpose, setting low/high addresses.
The address lines on the TSOP56 version are A1 -> A16
Re: TSOP48 version, that same pin A0 obviously is on the TSOP48 chip, one of the address lines 1 -> 16, it isn't for the same purpose as on the TSOP56 version.
On the above TSOP56 chip datasheet, A0 isn't used in 16 bit mode AND A1 -> A15 sets the addresses, A16, A17 and A19 have other purposes related to block addressing for flashing and erasing -
see screenshot from the TSOP56 datasheet below
There is actually a TSOP48 version of that same EEPROM chip, and it doesn't have an A19 address line and doesn't seem to an equivalent A0 (TSOP56) function pin either, looks to operate uniquely in 16 bit mode giving the full 8Mb (1MB).
https://www.alldatasheet.net/html-pdf/42...G-L70.html
I'm yet to fully cross reference all of the address lines between the two versions of the EEPROM, (actually have done most of that in the process of writing this).
HOWEVER - looking at the pinout that Benjamin Döpke managed to do in the google groups post: (I've added a few parts which he discovered later) to his ASCII graphic
Benjamin was so so close with his work and research, one or two datasheets probably would have got him over the line IMO.
* -Pin 1 sets the voltage at which the chip operates, at as it's dual voltage 3.3/5V
+--------------+
Vcc* | 1 \/ 40| Vcc
#CE | 2 39| A18
DQ15 | 3 38| A17
DQ14 | 4 37| A16
DQ13 | 5 36| A15
DQ12 | 6 35| A14
DQ11 | 7 34| A13
DQ10 | 8 33| A12
DQ9 | 9 32| A11
DQ8 |10 31| A10
GND |11 30| GND
DQ7 |12 29| A9
DQ6 |13 28| A8
DQ5 |14 27| A7
DQ4 |15 26| A6
DQ3 |16 25| A5
DQ2 |17 24| A4
DQ1 |18 23| A3
DQ0 |19 22| A2
#OE |20 21| A1
+--------------+
From the above, and cross referenced with the datasheet(s) if you remove some redundant pins, NC (x3), A0, A19 etc and a few others related specifically to writing/programming the EEPROM chip;
RP#
WE#
WP#
RY/BY#
Vpp
You get the relevant 40 pins that he correctly identified - which actually makes perfect sense as if you're booting from the Promice, you don't want to accidentally program that chip, it acts a ROM, to boot the machine.
Moving further, there are very cheap TSOP48 (solder down) -> DIP48 boards.
https://www.digikey.com.au/en/products/d...08/5014757
Using that as as a daughter card - one of those would need a board underneath, to re-route the 48 pins -> 40 pins , eliminating the extra, redundant 8 pins.
That could potentially enable the TSOP48 EEPROM (loaded with either correct firmware to be able to boot fully to program the onboard EEPROM) or potentially modified, experimental firmware that doesn't risk bricking a motherboard, if it doesn't work out, change the jumper &/or remove the other EEPROM from the socket altogether and correct the error.
Anyway, food for thought, now I'm going to have to haul the Octane off the shelf in the garage to see if such a device would fit underneath the CPU when it's installed...