Capture video with Flame using SDI-cable
#1
Capture video with Flame using SDI-cable
I have a Tezro with DM3 connected to a VBOB. I can generate a videosignal 1080i on an DSLR, which is converted from HDMI to SDI, that is recognized by HD-IN of VBOB (solid LED). But when I try to "import clip", Flame assumes some Kind of video tape recorder or Sony HD cam, and expects control codes.

Is there a way to make Flame simply "dumb framegrab"?

SGI - the legend will never die!!

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Geoman
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02-07-2020, 07:23 PM
#2
RE: Capture video with Flame using SDI-cable
In VBOB I get via serial cable:
Code:
vbob> v
vbob/video> s
HD1 is 1080i 50
HD2 is Not Present
SD1 is Not Present
SD2 is Not Present
HD Analog in is ANALOG_TIMING_NOT_PRESENT
SD Analog in is ANALOG_TIMING_NOT_PRESENT
So I set my Flame project to 1920 x 1080 HD 1080, 8-bit, Field 1 and Video Timing 1920x1080

Then I select Library -> Input Clip -> Engineering -> 1080@50i and in Input Clip "Process"

Code:
VTR: Capture: input signal is not present or has wrong timing

Any idea what I am doing wrong?

SGI - the legend will never die!!

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(This post was last modified: 02-12-2020, 12:47 PM by Geoman.)
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02-12-2020, 12:39 PM
#3
RE: Capture video with Flame using SDI-cable
The VBOB software comes with a whole suite of diagnostic programs, have you tried running those? It's been a while so I'm not sure if those install by default or if they're options that you have to select yourself. Also, you'll probably want to flash to the latest-and-greatest version of the VBOB firmware if you haven't done that already:

https://irix7.com/techpubs/007-4636-001.pdf

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vishnu
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02-12-2020, 02:53 PM
#4
RE: Capture video with Flame using SDI-cable
(02-12-2020, 02:53 PM)vishnu Wrote:  The VBOB software comes with a whole suite of diagnostic programs, have you tried running those? It's been a while so I'm not sure if those install by default or if they're options that you have to select yourself. Also, you'll probably want to flash to the latest-and-greatest version of the VBOB firmware if you haven't done that already:

https://irix7.com/techpubs/007-4636-001.pdf
Yes I flashed the VBOB with VBOB_FLASH. What I don't understand in this pdf is "# /etc/init.d/dmdaemon stop" because there is no dmdaemon vor Digital media. It's mldaemon.

recondas: "On the odd chance you don't already know, the XT-DIGVID (aka the DM2) won't work with the classic SGI (primarily analog) video tools like videoin or the underlying video daemon (videod). Instead they use SGI's later (digital) video media libraries (aka OpenML).
If you don't already have the software libraries for your DM2, you can freely download them SGI's Supportfolio site or Ian's Depot Resources page.
If a little additional background might prove helpful, this thread might be interesting: viewtopic.php?f=16&t=16727126&p=7354470&#p7354470
After you're able to get the DM2 to appear in an hinv -vm , you can try some of the tools supplied in the DM2 software, like xtdigvid_hinv or xtdigvid_confidence"

Or at least I don't have the dmdaemon and can't find it even if I have opened the whole 6.5.30 suite in swmgr searching for individual files. xtdigvid_confidence gives some weird errors. Maybe my selfmade LVDS-Cables have not the right properties.

Code:
./xtdigvid_hinv
/hw/module/001c01/IXbrick/xtalk/13
        XT-DIGVID (part number 030-1927-003 B), serial number NDP800
        IRIX number 0
        ML Device Index 0

./xtdigvidtst
Attempting to open board number: 0
*********************************
Starting <Verify XG ID>
---------------------------------

PASS: Found XG MAP RAM to have 64K entries
*********************************
Starting <Verify_xg_regs>
---------------------------------

PASS: HDTV XG registers passed
*********************************
Starting <config/board-status loopback test>
---------------------------------

PASS: config/board-status loopback test
*********************************
Starting <XG MAP RAM data path test>
---------------------------------

PASS: XG MAP RAM data path test
*********************************
Starting <XG MAP RAM address path test>
---------------------------------

PASS: XG MAP RAM address path test
*********************************
Starting <XG MAP RAM cell test>
---------------------------------

PASS: XG MAP RAM cell test
*********************************
Starting <Verify_gif_regs>
---------------------------------

PASS: HDTV GIF registers passed
*********************************
Starting <ODMA Tests>
---------------------------------

DMA started ...
DMA finished, rc = 0 ...
PASS: ODMA tests
*********************************
Starting <IDMA Tests>
---------------------------------

DMA started ...
DMA finished, rc = 0 ...
PASS: IDMA tests
*********************************
Starting <Doing LUT uniq test>
---------------------------------

PASS: LUT uniq test
*********************************
Starting <IXCC Red LUT data path test>
---------------------------------

PASS: IXCC Red LUT data path test
*********************************
Starting <IXCC Green LUT data path test>
---------------------------------

PASS: IXCC Green LUT data path test
*********************************
Starting <IXCC Blue LUT data path test>
---------------------------------

PASS: IXCC Blue LUT data path test
*********************************
Starting <IXCC Red LUT addr test>
---------------------------------

PASS: IXCC Red LUT addr test
*********************************
Starting <IXCC Green LUT addr test>
---------------------------------

PASS: IXCC Green LUT addr test
*********************************
Starting <IXCC Blue LUT addr test>
---------------------------------

PASS: IXCC Blue LUT addr test
*********************************
Starting <IXCC LUT Control Reg Test>
---------------------------------

PASS: IXCC LUT Control Reg Test
*********************************
Starting <IXCC Red LUT address test>
---------------------------------

PASS: IXCC Red LUT address test
*********************************
Starting <IXCC Green LUT address test>
---------------------------------

PASS: IXCC Green LUT address test
*********************************
Starting <IXCC Blue LUT address test>
---------------------------------

PASS: IXCC Blue LUT address test
*********************************
Starting <IXCC Red LUT broadcast data test>
---------------------------------

PASS: IXCC Red LUT broadcast data test
*********************************
Starting <IXCC Green LUT broadcast data test>
---------------------------------

PASS: IXCC Green LUT broadcast data test
*********************************
Starting <IXCC Blue LUT broadcast data test>
---------------------------------

PASS: IXCC Blue LUT broadcast data test
*********************************
Starting <IXCC Red LUT data test>
---------------------------------

PASS: IXCC Red LUT data test
*********************************
Starting <IXCC Green LUT data test>
---------------------------------

PASS: IXCC Green LUT data test
*********************************
Starting <IXCC Blue LUT data test>
---------------------------------

PASS: IXCC Blue LUT data test
*********************************
Starting <Doing LUT uniq test>
---------------------------------

PASS: LUT uniq test
*********************************
Starting <OXCC Red LUT data path test>
---------------------------------

PASS: OXCC Red LUT data path test
*********************************
Starting <OXCC Green LUT data path test>
---------------------------------

PASS: OXCC Green LUT data path test
*********************************
Starting <OXCC Blue LUT data path test>
---------------------------------

PASS: OXCC Blue LUT data path test
*********************************
Starting <OXCC Red LUT addr test>
---------------------------------

PASS: OXCC Red LUT addr test
*********************************
Starting <OXCC Green LUT addr test>
---------------------------------

PASS: OXCC Green LUT addr test
*********************************
Starting <OXCC Blue LUT addr test>
---------------------------------

PASS: OXCC Blue LUT addr test
*********************************
Starting <OXCC LUT Control Reg Test>
---------------------------------

PASS: OXCC LUT Control Reg Test
*********************************
Starting <OXCC Red LUT address test>
---------------------------------

PASS: OXCC Red LUT address test
*********************************
Starting <OXCC Green LUT address test>
---------------------------------

PASS: OXCC Green LUT address test
*********************************
Starting <OXCC Blue LUT address test>
---------------------------------

PASS: OXCC Blue LUT address test
*********************************
Starting <OXCC Red LUT broadcast data test>
---------------------------------

PASS: OXCC Red LUT broadcast data test
*********************************
Starting <OXCC Green LUT broadcast data test>
---------------------------------

PASS: OXCC Green LUT broadcast data test
*********************************
Starting <OXCC Blue LUT broadcast data test>
---------------------------------

PASS: OXCC Blue LUT broadcast data test
*********************************
Starting <OXCC Red LUT data test>
---------------------------------

PASS: OXCC Red LUT data test
*********************************
Starting <OXCC Green LUT data test>
---------------------------------

PASS: OXCC Green LUT data test
*********************************
Starting <OXCC Blue LUT data test>
---------------------------------

PASS: OXCC Blue LUT data test
*********************************
Starting <OXCC -> HDOC Tests>
---------------------------------

PASS: OXCC -> HDOC Tests
*********************************
Starting <HDTV PACKER register test>
---------------------------------

PASS: HDTV PACKER register test
*********************************
Starting <HDTV UNPACKER register test>
---------------------------------

PASS: HDTV UNPACKER register test
*********************************
Starting <HDTV OXCC register test>
---------------------------------

PASS: HDTV OXCC register test
*********************************
Starting <HDTV IXCC register test>
---------------------------------

PASS: HDTV IXCC register test
*********************************
Starting <HDOC register tests>
---------------------------------

PASS: HDOC register tests
*********************************
Starting <VIF writable registers test>
---------------------------------

PASS:  VIF writable registers test
*********************************
Starting <VIF Clock Detect Test>
---------------------------------

PASS: VIF Clock Detect Test
*********************************
Starting <UNPACK-HDOC Tests>
---------------------------------

PASS: UNPACK-HDOC Tests
*********************************
Starting <outpipe tests>
---------------------------------

PASS: outpipe tests
*********************************
Starting <inpipe tests>
---------------------------------

PASS: inpipe tests
*********************************
Starting <HDOC -> VIF External Link A Loopback Test>
---------------------------------

FAIL: HDOC -> VIF External Link A Loopback Test

EXITING TESTS


./xtdigvid_confidence

*********************************************************************
*********************************************************************
****                                                             ****
***        XTDIGVID_CONFIDENCE ===== XTDIGVID_CONFIDENCE          ***
***        XTDIGVID_CONFIDENCE ===== XTDIGVID_CONFIDENCE          ***
****                                                             ****
*********************************************************************
*********************************************************************


System type is: ORIGIN
System has 4 CPUs and 8192MB of memory
Found 1 XTDIGVID board(s)
Found 1 module(s)


Found 1 XTDIGVID board(s)

Starting xtdigvid_confidence script ......


Total XTDIGVID boards in the system is 1 board(s).
Test will run for 1 loop(s).


Board(s) information:

  XT-DIGVID plugged in /hw/module/001c01/IXbrick/xtalk/13
    (Part number is 030-1927-003, Rev B), Serial number NDP800


>>>>> PLEASE NOTE ABOUT PART NUMBERS <<<<<
>>>>> Each part number above corresponds to an XTDIGVID board.


==> Please verify that each board information is correct.

==> Verify that the total board reporting number matches
==> the number of boards installed.  Are they matched ? (y/n): y
Continuing with the xtdigvid_confidence......




Running standard XTDIGVIDTST tests.

INSTRUCTION:
   1) Connect a LVDS cable from the xtdigvid connector labelled P1     
      to the VBOB connector labelled P1.                               
                                                                       
   2) Connect a LVDS cable from the xtdigvid connector labelled P2     
      to the VBOB connector labelled P2.                               
                                                                       
   3) On the VBOB, connect a coax from 'HD out 1' to 'HD in 1'.        
                   connect a coax from 'HD out 2' to 'HD in 2'.        
                                                                       
   4) On the VBOB, connect a coax from 'SD out 1' to 'SD in 1'.        
                   connect a coax from 'SD out 2' to 'SD in 2'.        

Is everything ready <y/n>?: y
==> Continuing ...


xtdigvid_confidence script will run approximately 10 minutes (per XTDIGVID board per loop)
Looping 1 time(s) .....

Test log for board IRIX devnum 0 is /usr/tmp/XTDIGVID_logs/xtdigvid_confidence.log0.20-02-12_21.01

Found Irix boardnum 0 plugged in /hw/module/001c01/IXbrick/xtalk/13
    XT-DIGVID (Part number 030-1927-003, Rev B), Serial number NDP800



mldaemon restarted successfully
----- TESTING BOARD 0 -----
                                             
       UST INCREMENT CORRECTNESS CHECK       
                                             



Checking output path UST ...
Running command npri -s RR -r 100 /usr/diags/ml_xtdigvid/bin/dv_memtovid  -d xt-digvid -B 0 \
              -t ML_TIMING_525 \
              -v ML_COLORSPACE_CbYCr_601_HEAD \
              -i 8 \
              -S ML_SAMPLING_422 \
              -p ML_PACKING_8 \
              -s ML_SAMPLING_422 \
              -m ML_COLORSPACE_CbYCr_601_HEAD \
              -l ML_INTERLEAVE_MODE_INTERLEAVED \
              -D ML_DOMINANCE_F1 \
              -o ML_ORIENTATION_TOP_TO_BOTTOM \
              -G XTDIGVID_GENLOCK_SRC_TYPE_INTERNAL \
              -b 20 \
              -f /usr/diags/ml_xtdigvid/bin/testpattern/tpat525.yuv \
              -M 
transfer complete: length:701280 MSC:104 deltaMSC:2 UST:0x0000014ea49e4280 deltaUST:33369600 
transfer complete: length:701280 MSC:106 deltaMSC:2 UST:0x0000014ea69b6d60 deltaUST:33368800 
transfer complete: length:701280 MSC:108 deltaMSC:2 UST:0x0000014ea8989b60 deltaUST:33369600 
transfer complete: length:701280 MSC:110 deltaMSC:2 UST:0x0000014eaa95c960 deltaUST:33369600 
transfer complete: length:701280 MSC:112 deltaMSC:2 UST:0x0000014eac92f440 deltaUST:33368800 
transfer complete: length:701280 MSC:114 deltaMSC:2 UST:0x0000014eae902240 deltaUST:33369600 
transfer complete: length:701280 MSC:116 deltaMSC:2 UST:0x0000014eb08d5040 deltaUST:33369600 
transfer complete: length:701280 MSC:118 deltaMSC:2 UST:0x0000014eb28a7b20 deltaUST:33368800 
transfer complete: length:701280 MSC:120 deltaMSC:2 UST:0x0000014eb487a920 deltaUST:33369600 
transfer complete: length:701280 MSC:122 deltaMSC:2 UST:0x0000014eb684d720 deltaUST:33369600 
transfer complete: length:701280 MSC:124 deltaMSC:2 UST:0x0000014eb8820200 deltaUST:33368800 
transfer complete: length:701280 MSC:126 deltaMSC:2 UST:0x0000014eba7f3000 deltaUST:33369600 
transfer complete: length:701280 MSC:128 deltaMSC:2 UST:0x0000014ebc7c5e00 deltaUST:33369600 
transfer complete: length:701280 MSC:130 deltaMSC:2 UST:0x0000014ebe7988e0 deltaUST:33368800 
transfer complete: length:701280 MSC:132 deltaMSC:2 UST:0x0000014ec076b6e0 deltaUST:33369600 
transfer complete: length:701280 MSC:134 deltaMSC:2 UST:0x0000014ec273e4e0 deltaUST:33369600 
transfer complete: length:701280 MSC:136 deltaMSC:2 UST:0x0000014ec4710fc0 deltaUST:33368800 
transfer complete: length:701280 MSC:138 deltaMSC:2 UST:0x0000014ec66e3dc0 deltaUST:33369600 
transfer complete: length:701280 MSC:140 deltaMSC:2 UST:0x0000014ec86b6bc0 deltaUST:33369600


*************************************
UST Tolerance is 8000
UST Delta = 33370000
MSC Delta = 2
*************************************


**************** Checking ust/msc *****************



Last msc checked is 122
Status is 0; (0=passed; 1=failed)
UST variance error count is 0
PASS: ML Output path UST check.

                                                               
   SD 525   720x487  59.94i LOOPBACK TEST W/ INTERNAL GENLOCK  
                                                               


Starting video output on UUT...
Running command: npri -s RR -r 100 /usr/diags/ml_xtdigvid/bin/dv_memtovid  -d xt-digvid -B 0 \
              -t ML_TIMING_525 \
              -v ML_COLORSPACE_CbYCr_601_HEAD \
              -i 8 \
              -S ML_SAMPLING_422 \
              -p ML_PACKING_8 \
              -s ML_SAMPLING_422 \
              -m ML_COLORSPACE_CbYCr_601_HEAD \
              -l ML_INTERLEAVE_MODE_INTERLEAVED \
              -D ML_DOMINANCE_F1 \
              -o ML_ORIENTATION_TOP_TO_BOTTOM \
              -G XTDIGVID_GENLOCK_SRC_TYPE_INTERNAL \
              -I XTDIGVID_GENLOCK_TIMING_AUTODETECT \
              -b 1200 \
              -f /usr/diags/ml_xtdigvid/bin/testpattern/tpat525.yuv \
              -e /usr/diags/ml_xtdigvid/bin/tmp/memtovid_status \
              -F /usr/diags/ml_xtdigvid/bin/tmp/525bufout
[1] 2980
memtovid_status = 0

Starting video input on UUT...
Running command: npri -s RR -r 100 /usr/diags/ml_xtdigvid/bin/dv_vidtomem  -d xt-digvid -B 0 \
              -t ML_TIMING_525 \
              -v ML_COLORSPACE_CbYCr_601_HEAD \
              -i 8 \
              -S ML_SAMPLING_422 \
              -p ML_PACKING_8 \
              -s ML_SAMPLING_422 \
              -m ML_COLORSPACE_CbYCr_601_HEAD \
              -l ML_INTERLEAVE_MODE_INTERLEAVED \
              -D ML_DOMINANCE_F1 \
              -o ML_ORIENTATION_TOP_TO_BOTTOM \
              -b 4 \
              -f /usr/diags/ml_xtdigvid/bin/tmp/cap525 \
              -E /usr/diags/ml_xtdigvid/bin/tmp/memtovid_status \
              -F /usr/diags/ml_xtdigvid/bin/tmp/525bufin


timing: ML_TIMING_525
        videoWidth: 720
        videoStartY_f1: 20
        videoHeightf1: 244
        videoStartY_f2: 283
        videoHeightf2: 243


        imageWidth = 720
        imageHeight1 = 244
        imageHeight2 = 243

/usr/diags/ml_xtdigvid/bin/dv_vidtomem.2988 image buffer size = 701280

Wed Feb 12 21:01:59 PST 2020

/usr/diags/ml_xtdigvid/bin/dv_vidtomem.2988: NOTICE: VIDEO_SIGNAL_PRESENT:
        ML_VIDEO_SIGNAL_PRESENT_INT32 = ML_TIMING_525
/usr/diags/ml_xtdigvid/bin/dv_vidtomem.2988: ERROR:  DEVICE_ERROR
/usr/diags/ml_xtdigvid/bin/dv_vidtomem.2988: 0 buffers transferred
/usr/diags/ml_xtdigvid/bin/dv_vidtomem.2988: shutdown pending
Wed Feb 12 21:02:03 PST 2020
/usr/diags/ml_xtdigvid/bin/dv_vidtomem.2988: shutdown complete: exit_status = -1
Retrying test
Killing mldaemon.
xtdigvid_hinv and xtdigvidtst runs fine, in xtdigvid_confidence I get dv_vidtomem.3040: ERROR:  DEVICE_ERROR
vishnu also reported a failing test : So I just tried xtdigvid_confidence and mostly it fails.

Here is an example of an Octane2 running the tests flawlessly
[url=https://www.youtube.com/watch?v=7Dw3Q4sHQ_Y]SGI Octane 2 with DM 2 runs xtdigvid confidence tests

SGI - the legend will never die!!

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(This post was last modified: 02-12-2020, 08:32 PM by Geoman.)
Geoman
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02-12-2020, 07:37 PM
#5
RE: Capture video with Flame using SDI-cable
I thought the IRIX dmdaemon was part of its Digital Migration Facility:

https://techpubs.jurassic.nl/manuals/064.../ch02.html

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02-12-2020, 09:36 PM
#6
RE: Capture video with Flame using SDI-cable
Okay both selfmade cable sets fail to import any imagery from the VBOB, which sees a valid 1080i-signal. So I'm quite sure the modification disturbs the shielded and twisted pair characteritics of this connection, which has to transfer with 500mhz.
Therefore I bought a pair of originals LVDS cable for VBOB (white connectors, SGI PN 018-0985-001), LVDS cable for VBOB (black connectors, SGI PN 018-0946-001) because I'm sick of soldering long hours now.
The cable pairs which I made so far are at least good for communicating and flashing the vbob. For video-transfer they are seemingly too noisy.

SGI - the legend will never die!!

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(This post was last modified: 02-16-2020, 12:28 AM by Geoman.)
Geoman
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02-16-2020, 12:27 AM
#7
RE: Capture video with Flame using SDI-cable
Hi there,
did you configure your software initialization file for your IFFFS application correctly for live video input?
Please check the userguide page 161
http://download.autodesk.com/us/systemdo..._guide.pdf
For the the software initialisation configuration:
In a UNIX shell, type dlcfg to open the software initialisation configuration file in a text editor.
HarryT
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02-16-2020, 09:55 AM
#8
RE: Capture video with Flame using SDI-cable
(02-16-2020, 09:55 AM)HarryT Wrote:  Hi there,
did you configure your software initialization file for your IFFFS application correctly for live video input?
Please check the userguide page 161
http://download.autodesk.com/us/systemdo..._guide.pdf
For the the software initialisation configuration:
In a UNIX shell, type dlcfg to open the software initialisation configuration file in a text editor.
Yes I did switch to live video, but no luck. SGIs tools even show problems, so the original cables have to be used.
Code:
/usr/diags/ml_xtdigvid/bin % ./dv_vidtomem -t ML_TIMING_1125_1920x1080_50i


timing: ML_TIMING_1125_1920x1080_50i
        videoWidth: 1920
        videoStartY_f1: 21
        videoHeightf1: 540
        videoStartY_f2: 584
        videoHeightf2: 540


        imageWidth = 1920
        imageHeight1 = 540
        imageHeight2 = 540

./dv_vidtomem.2612 image buffer size = 6220800

Sat Feb 15 00:38:00 PST 2020

./dv_vidtomem.2612: NOTICE: VIDEO_SIGNAL_PRESENT:
        ML_VIDEO_SIGNAL_PRESENT_INT32 = ML_TIMING_1125_1920x1080_50i

./dv_vidtomem.2612 ERROR:  BUFFERS_ABORTED, aborting
./dv_vidtomem.2612: 0 buffers transferred
./dv_vidtomem.2612: shutdown pending
Sat Feb 15 00:38:04 PST 2020
./dv_vidtomem.2612: shutdown complete: exit_status = -1

SGI - the legend will never die!!

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Geoman
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02-16-2020, 11:26 PM
#9
RE: Capture video with Flame using SDI-cable
Well, when you have switched to live video, Flame should not expect RS-422 signal as you have discribed in the beginning of your post. What kind of player do you use? Where does the SDI signal come from? Is your RAID fast enough? Are you using a original Stone Array? Are you using a Tri Level Sync?
HarryT
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02-17-2020, 04:49 PM
#10
RE: Capture video with Flame using SDI-cable
I use an Sony Alpha RII --> Blackmagic HDMI to SDI --> Roland 75 Ohm SDI-cable to VBOB. Even dv_vidtomem or dv_vidtogfx won't work at all. I have one solitary internal harddisk assigned to stone, which give me 3000 frames for testing. I don't have got any sync - which should't be a problem according to uunix.

In the best case one has to make 4 adaptors: 2x (DM3 to 3M-cable and 3M-cable to VBOB), and has to make sure that twisted-pair-wires are not seperated inside the cable, otherwise I'm now quite sure that the DM3-board inside Tezro only receives a garbled signal.

My bad adapters 'respect' the pinout as reseached on nekochan some years ago, so that simple data-transfer like in "vbob_flash" works, but in no way can a 5.44Gbit/s - 170 MHz-signal 'survive' on seperated twisted pairs.

Okay nevertheless I tried inputting live video. I get: "VTR: Capture: input signal is not present or has wrong timing" What the FUU12%&§%§" !! it works!!

   

The image is flickering and there are "dead" pixels - like the garbled signal I've got.

BUT: thank you HarryT for not letting giving me up - so there is a proof of concept for a selfmade cable

SGI - the legend will never die!!

Indy Indigo Crimson Indigo2 R10000/IMPACT Indigo2 R10000/IMPACT O2 O2 Octane Octane2 Octane2 Tezro
(This post was last modified: 02-17-2020, 09:05 PM by Geoman.)
Geoman
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02-17-2020, 08:32 PM


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