(08-18-2022, 12:33 PM)jwhat Wrote: Hi Weblacky,
yes we saw the structure and I got as far as to find potential POD / CAC command that could write back to memory:
Also as per boot diags: copying PROM code to memory ............... Copy PROM (0x9000000018000000) to RAM (0x9600000001a00000), len 0x168648
You can read PROM via POD/CAC directly using address: 0x9000000018000000
So it maybe possible that you can also write directly to these memory locations using the corresponding store commands:
>> A 000 001c01: Store byte: sb ADDR [VAL [COUNT]]
>> A 000 001c01: Store half-word: sh ADDR [VAL [COUNT]]
>> A 000 001c01: Store word: sw ADDR [VAL [COUNT]]
>> A 000 001c01: Store double-word: sd ADDR [VAL [COUNT]]
>> A 000 001c01: Store and verify: sdv ADDR VAL
I gather based on your logs that you do not even get the point of getting "copying PROM code to memory ..." as it fails as soon as it tries to access memory...
If it is the case that your problem really is due to speed mismatch, then it is 100% confirmed that you cannot change speed except by putting in faster CPU module, as per Hamei's assertion way back when..
Cheers from Oz,
jwhat/John
Hi Jwhat,
I do get to the copying PROM to memory line. The cache failure happens on the next line right after it (testing cache) so it’s not really started, I guess.
Code:
IP35 PROM SGI Version 6.210 built 02:33:51 PM Aug 26, 2004
Running in DDR mode
Testing/Initializing memory ............... DONE
Copying PROM code to memory ............... DONE
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Full March: DATA
Failure : ECC Miscompare
Address : 0xa8000000000037f0 (Way 0)
Off --------- Data ---------- ECC
Expected : 70 5555555555555555 0000000000000000 155
Received : 70 5555557555555555 0000000000000000 155
Syndrome : 70 0000002000000000 0000000000000000 000
Failing Bits
SCData<101>
Asterix R14K CPU C3D1 [Pin AG33] SRAM C8E6 [Pin H8]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Full March: DATA
Failure : ECC Miscompare
Address : 0xa800000000003ab0 (Way 0)
Off --------- Data ---------- ECC
Expected : 30 cccccccccccccccc 0000000000000000 0cc
Received : 30 ccccdceccccccccc 0000000000000000 0cc
Syndrome : 30 0000102000000000 0000000000000000 000
Failing Bits
SCData<101>
Asterix R14K CPU C3D1 [Pin AG33] SRAM C8E6 [Pin H8]
SCData<108>
Asterix R14K CPU C3D1 [Pin AC27] SRAM C8E6 [Pin K2]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Full March: DATA
Failure : ECC Miscompare
Address : 0xa800000000003790 (Way 0)
Off --------- Data ---------- ECC
Expected : 10 0f0f0f0f0f0f0f0f 0000000000000000 30f
Received : 10 0f0f0f0f4f0f0f0f 0000000000000000 30f
Syndrome : 10 0000000040000000 0000000000000000 000
Failing Bits
SCData<94>
Asterix R14K CPU C3D1 [Pin AK1] SRAM C8B7 [Pin D1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Base Address: DATA
Failure : Brother Double Word Not Zero
Address : 0x0000000000000008 (Way 0)
Off --------- Data ---------- ECC
Expected : 00 0000000000000000 5555555555555555 155
Received : 00 0000000040000000 5555555555555555 155
Syndrome : 00 0000000040000000 0000000000000000 000
Failing Bits
SCData<94>
Asterix R14K CPU C3D1 [Pin AK1] SRAM C8B7 [Pin D1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Base Address: DATA
Failure : Data Miscompare
Address : 0x0000000000000000 (Way 0)
Off --------- Data ---------- ECC
Expected : 00 aaaaaaaaaaaaaaaa 0000000000000000 2aa
Received : 00 eaaaaaaaeaaaaaaa 0000000000000000 2aa
Syndrome : 00 4000000040000000 0000000000000000 000
Failing Bits
SCData<94>
Asterix R14K CPU C3D1 [Pin AK1] SRAM C8B7 [Pin D1]
SCData<126>
Asterix R14K CPU C3D1 [Pin AK30] SRAM C8E6 [Pin D1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Walking Address: DATA
Failure : Data Miscompare
Address : 0x0000000000002000 (Way 0)
Off --------- Data ---------- ECC
Expected : 00 aaaaaaaaaaaaaaaa 0000000000000000 2aa
Received : 00 aaaaaaaaeaaaaaaa 0000000000000000 2aa
Syndrome : 00 0000000040000000 0000000000000000 000
Failing Bits
SCData<94>
Asterix R14K CPU C3D1 [Pin AK1] SRAM C8B7 [Pin D1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Walking Address: DATA
Failure : Data Miscompare
Address : 0x0000000000001000 (Way 0)
Off --------- Data ---------- ECC
Expected : 00 aaaaaaaaaaaaaaaa 0000000000000000 2aa
Received : 00 eaaaaaaaeaaaaaaa 0000000000000000 2aa
Syndrome : 00 4000000040000000 0000000000000000 000
Failing Bits
SCData<94>
Asterix R14K CPU C3D1 [Pin AK1] SRAM C8B7 [Pin D1]
SCData<126>
Asterix R14K CPU C3D1 [Pin AK30] SRAM C8E6 [Pin D1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Base + Walk/Inv: DATA
Failure : Brother Double Word Not Zero
Address : 0x0000000000000009 (Way 1)
Off --------- Data ---------- ECC
Expected : 00 0000000000000000 0000000000000000 000
Received : 00 0000000040000000 0000000000000000 000
Syndrome : 00 0000000040000000 0000000000000000 000
Failing Bits
SCData<94>
Asterix R14K CPU C3D1 [Pin AK1] SRAM C8B7 [Pin D1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Short March: DATA
Failure : Data Miscompare
Address : 0x0000000000000100 (Way 0)
Off --------- Data ---------- ECC
Expected : 00 5555555555555555 0000000000000000 155
Received : 00 555555d555555555 0000000000000000 155
Syndrome : 00 0000008000000000 0000000000000000 000
Failing Bits
SCData<103>
Asterix R14K CPU C3D1 [Pin AD30] SRAM C8E6 [Pin H3]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Full March: DATA
Failure : ECC Miscompare
Address : 0xa800000000003810 (Way 0)
Off --------- Data ---------- ECC
Expected : 10 5555555555555555 0000000000000000 155
Received : 10 55555d7555555555 0000000000000000 155
Syndrome : 10 0000082000000000 0000000000000000 000
Failing Bits
SCData<101>
Asterix R14K CPU C3D1 [Pin AG33] SRAM C8E6 [Pin H8]
SCData<107>
Asterix R14K CPU C3D1 [Pin AA27] SRAM C8E6 [Pin H1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Walking Address: DATA
Failure : Data Miscompare
Address : 0x0000000000002000 (Way 0)
Off --------- Data ---------- ECC
Expected : 00 5555555555555555 0000000000000000 155
Received : 00 5555557555555555 0000000000000000 155
Syndrome : 00 0000002000000000 0000000000000000 000
Failing Bits
SCData<101>
Asterix R14K CPU C3D1 [Pin AG33] SRAM C8E6 [Pin H8]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Walking Address: DATA
Failure : Data Miscompare
Address : 0x0000000000001000 (Way 0)
Off --------- Data ---------- ECC
Expected : 00 5555555555555555 0000000000000000 155
Received : 00 55555d7555555555 0000000000000000 155
Syndrome : 00 0000082000000000 0000000000000000 000
Failing Bits
SCData<101>
Asterix R14K CPU C3D1 [Pin AG33] SRAM C8E6 [Pin H8]
SCData<107>
Asterix R14K CPU C3D1 [Pin AA27] SRAM C8E6 [Pin H1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Walking Address: DATA
Failure : Data Miscompare
Address : 0x0000000000000800 (Way 0)
Off --------- Data ---------- ECC
Expected : 00 5555555555555555 0000000000000000 155
Received : 00 55555df555555555 0000000000000000 155
Syndrome : 00 000008a000000000 0000000000000000 000
Failing Bits
SCData<101>
Asterix R14K CPU C3D1 [Pin AG33] SRAM C8E6 [Pin H8]
SCData<103>
Asterix R14K CPU C3D1 [Pin AD30] SRAM C8E6 [Pin H3]
SCData<107>
Asterix R14K CPU C3D1 [Pin AA27] SRAM C8E6 [Pin H1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Walking Address: DATA
Failure : Data Miscompare
Address : 0x0000000000000400 (Way 0)
Off --------- Data ---------- ECC
Expected : 00 5555555555555555 0000000000000000 155
Received : 00 55555d7555555555 0000000000000000 155
Syndrome : 00 0000082000000000 0000000000000000 000
Failing Bits
SCData<101>
Asterix R14K CPU C3D1 [Pin AG33] SRAM C8E6 [Pin H8]
SCData<107>
Asterix R14K CPU C3D1 [Pin AA27] SRAM C8E6 [Pin H1]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Base + Walk/Inv: DATA
Failure : Data Miscompare
Address : 0x0000000000000001 (Way 1)
Off --------- Data ---------- ECC
Expected : 00 5555555555555555 0000000000000000 155
Received : 00 5555557555555555 0000000000000000 155
Syndrome : 00 0000002000000000 0000000000000000 000
Failing Bits
SCData<101>
Asterix R14K CPU C3D1 [Pin AG33] SRAM C8E6 [Pin H8]
SECONDARY CACHE DATA FAILURE: Module 001c01 CPU A
Subtest : Short March: DATA
Failure : Data Miscompare
Address : 0x0000000000000001 (Way 1)
Off --------- Data ---------- ECC
Expected : 00 5555555555555555 0000000000000000 155
Received : 00 55555d7555555555 0000000000000000 155
Syndrome : 00 0000082000000000 0000000000000000 000
Failing Bits
SCData<101>
Asterix R14K CPU C3D1 [Pin AG33] SRAM C8E6 [Pin H8]
SCDat
NEED -> 